Fast Chips: US PTO launches fast-track examination for semiconductor patents
The USPTO has announced a Semiconductor Technology Pilot Program for fast-track examination of qualifying semiconductor-related inventions. The program is designed to support the US CHIPS Act, which is the US Government’s package of funding to support the domestic semiconductor ecosystem in the US.
The Pilot Program will run for 1 year from 1 December 2023 or until 1000 applications have been grated special status under the program. Qualifying applications will be advanced out of turn for examination until a first Office Action is issued. To enter the program, applicants must file a petition form (Form PTO/SB/467), however no fee is required, and applicants are not required to satisfy the requirements of other acceleration programs.
Key Requirements
The Pilot Program is open to original nonprovisional applications that are not continuation applications. Applications may only claim priority from one nonprovisional US application or international application designating the US. However, the application can claim priority from one or more provisional US applications or foreign applications.
Eligible applications must include at least one claim that covers a process or apparatus for a semiconductor device that corresponds to patent classifications H10 or H01L of the Cooperative Patent Classification (CPC) system.
The petition to make special should be filed with the application or within 30 days of filing. As such, most pending patent applications will not qualify. Applications must also be filed electronically and use the DOCX format.
Additional Certifications
The petition to make special must include four certifications. These are worth quoting in full, as they seem to go beyond the basic eligibility and technology requirements:
- The applicant has a good faith belief that the claimed invention(s) meeting the technology requirement of the pilot program improves the manufacturing of semiconductor devices;
- The process or apparatus covered by the claimed invention(s) meeting the technology requirement of the pilot program is disclosed in the specification as being primarily focused on the manufacturing of semiconductor devices;
- The applicant has a good faith belief that expediting examination of the application will have a positive impact on the semiconductor manufacturing industry, such as increasing semiconductor device production, lowering semiconductor manufacturing costs, or increasing the resilience of the semiconductor supply chain; and
- The inventor or any joint inventor has not been named as the inventor or a joint inventor on more than four other nonprovisional applications in which a petition to make special under this pilot program has been filed.
Certification 1 appears to simply mean that the applicant believes that the application will be classified under the H10 or H01L CPCs. Certification 4 limits inventors to taking part in no more than 5 applications under the program.
Certifications 2 and 3 seem somewhat subjective. Certification 2 appears to require that the primary focus of the application is the manufacture of semiconductor devices. Presumably this means that if the application is primarily about another field of technology, say biosensors, but includes a feature that might fall within H10 or H01L, the application would not qualify. It also seems to suggest that manufacturing is key, rather than the semiconductor devices themselves. It’s not clear if this will mean that applications focussed on device design rather than manufacturing processes will not qualify.
Certification 3 requires that expediting examination will have a positive impact on the semiconductor manufacturing industry. It is not clear how this should be assessed. For example, does any improvement in a semiconductor manufacturing technique qualify, or is there some additional economic requirement? I suspect this is not intended to be an onerous requirement, and that any improvement to semiconductor manufacturing will qualify.
It’s not clear how compliance with these requirements will be monitored and what the sanctions might be for non-compliance. I assume non-compliance will mean an application will not be admitted to the Pilot Program. My guess is that compliance will not be particularly rigorously assessed, and if the application describes an improvement in a semiconductor processes, it will qualify.
We’ll need to wait and see how the US PTO deals with interpretation and compliance with these certifications.
Who will benefit?
It is worth noting that accelerated examination is not always desirable. Many organisations prefer to slow down the patent process while they develop their products. This can give greater freedom to map patent claims to a final product, which might occur years after a patent filing. This perhaps favours larger organisations or those with deeper pockets, as it can introduce expense.
There are many instances when obtaining a patent quickly can be beneficial. For example, if a product is going to market quickly, or if there is a known infringer, then speed can be of the essence. Additionally, fast examination can be cheaper, as the applicant is typically trying to work towards a quick grant and is more likely comply with examiner requests for amendment. This can be attractive to start-ups or others with limited resources.
It’s also worth noting that H01L and H10 are limited to semiconductor devices and processes. Innovation at the electronic circuit level is typically classified under H03 (electronic circuits) and innovation at the chip logic design level is typically classified under G06 (computing). Given this, companies operating on the edge of semiconductor and circuit design may wish to think careful about how they draft their claims if they wish to take advantage of the Pilot Program.
Supporting US Manufacturing
On the face of it, there is nothing in the Pilot Program that restricts it to US entities or companies supporting the US semiconductor supply chain. None of the petition certifications mention the US explicitly. This might seem surprising given the intention to support the US CHIPS Act which is meant to support US domestic semiconductor production. This is most likely because the US is a World Trade Organisation (WTO) member and is therefore bound by the TRIPS Agreement. This prevents WTO members from providing less favourable treatment to the nationals of other member states than it does to its own nationals with regards to IP protection.
In fact, the eligibility criteria appear to slightly benefit foreign applicants. US-based applicants may have two or more priority founding nonprovisional US applications on file, which would prevent a later priority-claiming application from being eligible. However, foreign applicants with multiple foreign priority founding applications would be eligible. This also seems odd given the aim to support domestic US chip manufacturer.
Will other jurisdictions follow suit?
When the US CHIPS Act was introduced, other countries quickly followed suit, introducing their own industrial policies around semiconductors. For example, the EU introduced the EU CHIPS Act, and China and Taiwan have introduced their own funding initiatives. The UK has introduced its own National Semiconductor Strategy.
Furthermore, several Patent Offices around the world have fast-track programmes for green technology, showing that once one office begins such an initiative, others tend to follow suit.
The UK has real strength in spin-outs and start-ups in the semiconductor sector. These companies could benefit from quicker, and potentially cheaper patent examination. I would encourage the UK IPO to consider implementing a similar initiative, alongside the existing Green Channel.
Conclusion
The USPTO’s Pilot Program is a positive move for companies in the semiconductor industry who wish to accelerate examination. Spin-outs and start-ups in particularly are likely to benefit. That said, whether this really supports the US CHIPS Act is unclear. It seems foreign companies who may wish to act against US competitors will benefit just as much, given they have access to the program.
Furthermore, it’s unclear how the certifications will be interpreted and enforced. It seems likely that they will not be enforced strictly, in which case the program will benefit most semiconductor technologies.
I will be watching carefully to see how the program is implemented, particularly looking at the US PTO’s interpretation of the qualifying criteria and certifications.
I hope that the UK IPO and other offices will follow suit, recognising the importance to the global economy of this important technology.
Link to Pilot Program: Semiconductor Technology Pilot Program | USPTO
Link to petition: PTO/SB/467 - Semiconductor Pilot Program (uspto.gov)